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Sr. Manager, RF Silicon Development (Starshield)

1 month ago
United States
Full-time
Lead
Hardware Engineer
IoT and Embedded Systems
GAN Verilog
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SpaceX

SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the aim of revolutionizing space technology and enabling human life on other planets.

Aerospace & Defense
10K-50K
Founded 2002
View All Jobs 278

Description

  • Lead a team responsible for the design of RFICs and ASICs for Starshield projects.
  • Recruit, develop, train, and retain high-performing team members.
  • Lead architectural trade studies for features, performance requirements, and system limitations.
  • Derive subsystem and circuit specifications and partition functions between hardware and software domains with modem, DSP, and ASIC engineers.
  • Work with engineering leaders to drive product requirements for Starshield satellites.
  • Design, simulate, and model RF, analog, and mixed-signal circuits and systems, including packaging.
  • Develop analog, mixed-signal, RF, and microwave circuits in SiGe, GaAs, GaN, or CMOS processes.
  • Own prototypes, product development, and release to production.
  • Develop laboratory measurement and characterization capabilities for RFICs and bring up and evaluate prototypes.
  • Work with manufacturing and test engineers on production testing and qualification of RFIC components and systems.

Requirements

  • Bachelor's degree in electrical engineering, computer engineering, or computer science.
  • 8+ years of professional RF integrated circuit experience.
  • 2+ years of experience managing technical teams.
  • Master's degree or PhD in electrical engineering or computer engineering with an emphasis in RF, analog, or mixed-signal integrated circuit design (preferred).
  • Experience using simulation tools such as Spectre, ADS, HFSS, or Momentum (preferred).
  • Experience with linear and non-linear circuit analysis and simulation, including PLLs, vector modulators/demodulators, oscillators, mixers, filters, low-noise amplifiers, and power amplifiers (preferred).
  • Experience developing complex ASICs, including micro-architecture definition, RTL implementation in Verilog/SystemVerilog, and top-level integration for fully verified, synthesis/timing-clean designs (preferred).
  • Experience with multicore CPU subsystem design, standard bus protocols such as AXI or AHB, and embedded processors (preferred).
  • Experience solving clock domain crossing and power optimization problems, along with high-speed and low-power design techniques (preferred).
  • Familiarity with RF front-end theory and MMIC design from S-band to W-band, and with test equipment such as spectrum analyzers, vector signal analyzers, vector signal generators, and network analyzers (preferred).
  • Ability to work long hours and weekends as necessary to support critical milestones.
  • Willingness to travel for off-site testing.
  • Must meet ITAR eligibility requirements as a U.S. citizen or national, lawful permanent resident, refugee, asylee, or otherwise eligible for required U.S. State Department authorizations.

Benefits

  • Base salary range of $220,000 to $290,000.
  • Potential eligibility for long-term incentives, including company stock or long-term cash awards.
  • Potential discretionary bonuses and Employee Stock Purchase Plan access.
  • Comprehensive medical, vision, and dental coverage.
  • 401(k) retirement plan, plus short- and long-term disability insurance and life insurance.
  • Paid parental leave.
  • Three weeks of paid vacation and 10 or more paid holidays per year.
  • Paid sick leave pursuant to company policy.
  • 10% differential, up to an additional $20,000 annually, for employees with an active clearance once briefed into a classified program.

Interested in this position?

Apply directly on the company website

Apply Now

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