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K2 Space is seeking a Senior FPGA & Silicon Bring-up Engineer to help develop and validate next-generation communications ASICs across pre-silicon prototyping, first-silicon bring-up, and system integration.
Impinj is seeking a Senior RTL Verification Engineer to verify next-generation RAIN RFID Reader ICs within its Silicon Engineering team, from test planning through tapeout and validation.
Impinj is hiring a senior digital design engineer to develop next-generation RAIN RFID Reader ICs, taking mixed-signal digital subsystems from architecture through silicon validation.
K2 Space is hiring a Senior ASIC Emulation Engineer to lead pre-silicon emulation for next-generation satellite hardware and accelerate hardware/software co-development and verification.
Fidus is hiring a Hardware Designer to develop and validate complex high-speed electronic systems for clients across emerging technology markets.
An independent contractor will support a client’s AI initiative by applying ASIC and SoC design and verification expertise to create, evaluate, and improve hardware engineering tasks for frontier AI systems.
Palantir’s American Tech Fellowship is a 12-week virtual training program with Ontologize focused on helping participants learn Foundry and AIP to deploy enterprise software and potentially interview for future roles at Palantir or partner companies.
K2 Space is seeking a Principal ASIC Design Verification Engineer to verify custom silicon for its next-generation satellite platforms and help shape first-generation chip design for missions from LEO to deep space.
K2 Space is seeking a Senior ASIC Design Verification Engineer to help verify first-generation custom silicon for its high-power satellite platforms.
Kepler Communications is hiring a Senior Embedded Software Designer to develop and maintain embedded software for spacecraft and ground systems supporting its growing satellite fleet and space communications platform.
FPGA Engineer at a high-frequency trading company, building ultra-low-latency hardware systems that improve trading performance and support live market infrastructure.
Design Verification Engineer for a distributed engineering team focused on validating hardware and system designs through rigorous testing, automation, and cross-functional collaboration.
