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DRW is hiring an FPGA Developer to work with technologists, quantitative researchers, and traders on proprietary technology for low-latency trading and automated systems.
K2 Space is hiring a Senior Mixed-Signal Verification Engineer to develop behavioral models and mixed-signal verification methodology for advanced SoCs used on large, high-power satellites.
K2 Space is seeking a Mixed-Signal Behavioral Modeling Engineer to build behavioral models and mixed-signal verification methodology for advanced SoCs used on large satellites, with direct impact on integration and silicon tapeout success.
K2 Space is hiring an ASIC Design Verification Engineer to verify custom silicon for its next-generation satellite platforms and help shape first-generation spacecraft hardware.
Anduril Industries is hiring a Senior Embedded Engineer for its AIRS team to develop new cooled infrared imaging products, from FPGA-based design and prototyping through testing and product maturity.
Anduril Industries is hiring a Senior Firmware Engineer to help design and mature new infrared imaging product lines within its AIRS team, from prototype development through ground and flight testing.
K2 Space is seeking a Principal ASIC Design Verification Engineer to verify custom silicon for its next-generation satellite platforms and help shape first-generation chip design for missions from LEO to deep space.
K2 Space is hiring a Senior Mixed-Signal Verification Engineer to develop behavioral modeling and mixed-signal verification for advanced SoCs used on large, high-power satellites.
K2 Space is seeking a Senior ASIC Design Verification Engineer to help verify first-generation custom silicon for its high-power satellite platforms.
K2 Space is hiring an ASIC Design Verification Engineer to verify custom silicon for first-generation spacecraft platforms in a fast-moving Series C space startup.
SpaceX is seeking a Senior RTL Design Engineer to develop next-generation ASICs for Starlink satellite and ground infrastructure systems supporting global connectivity.
SpaceX is hiring a Principal DFT Engineer to develop and validate next-generation ASICs for Starlink’s space and ground infrastructure.
SpaceX is hiring a Senior RTL Design Engineer to develop next-generation ASICs for Starlink’s space and ground infrastructure.
SpaceX is hiring a Sr. RTL Design Engineer to develop next-generation ASICs for Starlink’s space and ground infrastructure.
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