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Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

1 week, 5 days ago
United States
Full-time
Senior
Hardware Engineer
Quality Assurance and Testing
Bash Perl Python SOC
Apply Now
SpaceX

SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the aim of revolutionizing space technology and enabling human life on other planets.

Aerospace & Defense
10K-50K
Founded 2002
View All Jobs 256

Description

  • Own and execute full-chip DRC, LVS, ESD, PERC, and antenna signoff using industry-standard verification tools.
  • Develop, maintain, and optimize physical verification flows for advanced-node SoCs.
  • Interpret foundry Design Rule Manuals and translate rule updates into verified flow changes.
  • Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs.
  • Perform ESD verification and validate protection strategies, current paths, and CDM/HBM compliance.
  • Drive tapeout readiness by coordinating signoff across block-level, top-level, and Hard IP design teams.
  • Engage with foundry teams to resolve DRM ambiguities and waiver requests.
  • Develop or modify design flows to improve chip quality of results and support integration requirements.
  • Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows.

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, or computer science.
  • 5+ years of ASIC and/or physical design flow development experience in industry.
  • Experience with SoC top-level physical design flows, including floor-planning, I/O, bump and RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, and interface planning.
  • Experience in IP integration, including memories, I/O, analog IPs, SerDes, and DDR.
  • Deep expertise in DRC, LVS, PERC, and ESD verification methodologies.
  • Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus.
  • Direct foundry DRM experience with the ability to read, interpret, and implement complex rule decks.
  • Experience at advanced nodes, preferably 4nm and below.
  • Experience with large SoC designs greater than 10M gates and frequencies above 1GHz.
  • Strong scripting skills in csh/bash, Perl, Python, TCL, Makefile, or similar tools.
  • Self-driven with a can-do attitude and ability to work effectively in a dynamic group environment.
  • Ability to work extended hours and weekends as needed to meet critical project milestones.
  • U.S. citizenship, U.S. national status, permanent residency, refugee status, asylee status, or eligibility to obtain required U.S. Department of State authorizations under ITAR.

Benefits

  • Base salary range of $160,000 to $225,000 per year.
  • Eligibility for long-term incentives, including company stock, stock options, or long-term cash awards.
  • Potential discretionary bonuses and access to an Employee Stock Purchase Plan with discounted stock purchase.
  • Comprehensive medical, vision, and dental coverage.
  • 401(k) retirement plan plus short- and long-term disability insurance and life insurance.
  • Paid parental leave.
  • 3 weeks of paid vacation and 10 or more paid holidays per year.
  • 5 days of sick leave per year for exempt employees.

Interested in this position?

Apply directly on the company website

Apply Now

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