Design Verification Engineer

4 months, 1 week ago
Full-time
Senior
Quality Assurance and Testing

Erbity

Erbity describes itself as a semiconductor design services firm providing end-to-end solutions from concept to silicon, specializing in advanced nodes down to 3nm and supporting architecture through tape-out execution.

Semiconductor Manufacturing
11-50

Description

  • Develop, execute, and refine comprehensive test plans and procedures to verify functional and performance specifications.
  • Identify, document, and track design defects, and collaborate with designers and stakeholders to resolve issues.
  • Analyze test results and datasets to identify patterns or trends and recommend design optimizations.
  • Design and implement automated test scripts and scalable verification frameworks to improve efficiency and coverage.
  • Partner with engineering teams to ensure requirements are fully validated and designs are implemented correctly downstream.
  • Create and maintain technical documentation, including traceability matrices, test reports, and verification plans.
  • Participate in design reviews and provide feedback on requirements and design-for-testability principles.

Requirements

  • Extensive experience with SystemVerilog and UVM is required.
  • Proficiency in Verilog or VHDL for design understanding.
  • Strong command of Python, Perl, or Tcl for automated test scripting and CI/CD pipeline maintenance.
  • Proficiency with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium, or Siemens Questa.
  • Expertise in debugging with Verdi or similar waveform viewers.
  • Experience with constrained-random verification, assertion-based verification (SVA), and functional coverage.
  • Familiarity with high-speed interface protocols such as PCIe, AMBA (AXI/AHB), USB, or DDR.

Interested in this position?

Apply directly on the company website

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