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Manager, ASIC Design Engineering (Starshield Satellite Engineering)

57 minutes ago
United States
Full-time
Lead
Hardware Engineer
IoT and Embedded Systems
Python Verilog
Apply Now
SpaceX

SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the aim of revolutionizing space technology and enabling human life on other planets.

Aerospace & Defense
10K-50K
Founded 2002
View All Jobs 128

Description

  • Lead a small team responsible for the digital design of ASICs and/or FPGAs for Starshield projects.
  • Lead architectural trade studies for features, performance requirements, and system limitations.
  • Derive subsystem and circuit specifications and partition functions between hardware and software with modem/DSP and RFIC engineers.
  • Define micro-architecture, implement RTL in Verilog/SystemVerilog, and deliver fully verified, synthesis- and timing-clean designs.
  • Work closely with the verification team to ensure complete design coverage and verification.
  • Collaborate with engineering leaders to drive product requirements and improve satellite performance.
  • Recruit, develop, train, and retain high-performing team members.
  • Provide timing constraints and support physical implementation activities such as synthesis, timing closure, and formality checks.
  • Participate in silicon bring-up and validation.
  • Assist in developing automated test lab equipment for lab measurements.

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, computer science, or another engineering discipline.
  • 5+ years of experience in RTL implementation and/or FPGA/ASIC development.
  • 2+ years of experience with direct report management or mentoring an engineering team.
  • Experience solving clock domain crossing and power optimization issues (preferred).
  • Experience developing complex ASICs (preferred).
  • Experience with multicore CPU subsystem design (preferred).
  • Experience with standard bus protocols such as AXI or AHB (preferred).
  • Experience with embedded processors (preferred).
  • Experience with high-speed and low-power design techniques (preferred).
  • Scripting skills in Python, TCL, or similar languages (preferred).
  • Experience with EDA tools including HDL simulators such as VCS, Questa, or IES; lint tools such as Spyglass; and FPGA tools such as Xilinx Vivado or Altera Quartus II (preferred).
  • Ability to work in a dynamic environment with changing needs and requirements.
  • Team-player with a can-do attitude and the ability to work well both in a group and individually.
  • Willingness to work long hours and weekends as necessary to support critical milestones.
  • Willingness to travel for off-site testing.
  • Ability to obtain or hold an active TS-SCI clearance may be required for sensitive missions.
  • Must meet ITAR requirements as a U.S. citizen/national, lawful permanent resident, refugee, asylee, or otherwise eligible for required U.S. Department of State authorizations.

Benefits

  • Competitive base salary of $190,000 to $245,000 per year, with a 10% clearance differential of up to an additional $20,000 annually for active clearance holders.
  • Eligibility for long-term incentives, including company stock or long-term cash awards.
  • Potential discretionary bonuses and the ability to purchase additional stock through an Employee Stock Purchase Plan.
  • Comprehensive medical, vision, and dental coverage.
  • 401(k) retirement plan.
  • Short- and long-term disability insurance, life insurance, and paid parental leave.
  • Approximately 3 weeks of paid vacation and 10 or more paid holidays per year.
  • Paid sick leave in accordance with company policy.

Interested in this position?

Apply directly on the company website

Apply Now

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