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Senior Mixed-Signal Verification Engineer

8 hours, 1 minute ago
United States
Full-time
Senior
Hardware Engineer
Quality Assurance and Testing
MATLAB Python Verilog
Apply Now

K2 Space Corporation

K2 Space builds high-powered satellite platforms and satellite buses for missions across LEO, MEO, and GEO, emphasizing higher payload power, large payload mass, vertical integration, and in-house manufacturing.

Defense and Space Manufacturing
51-200
Founded 2022
$180M raised
View All Jobs 128

Description

  • Develop high-level behavioral models for analog and mixed-signal IP such as ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing, and amplifiers.
  • Create abstracted models using Verilog, Verilog-AMS, or SystemVerilog.
  • Develop regression infrastructure and mixed-signal testbenches for digital and analog co-simulation.
  • Integrate AMS models into UVM-based digital verification environments.
  • Define and build mixed-signal verification methodology for top-level SoC and subsystem verification.
  • Support architectural exploration through early-phase modeling and system-level simulations.
  • Collaborate with analog and RF designers to translate real-world behavior into accurate behavioral abstractions.
  • Work with digital and verification teams to ensure seamless integration of AMS models.
  • Provide modeling and verification input during architectural reviews, PDR/CDR, and silicon bring-up.
  • Act as a technical leader and subject-matter expert across modeling and verification.

Requirements

  • M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
  • 5+ years of experience in analog/mixed-signal modeling and/or AMS verification.
  • Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent modeling languages.
  • Strong understanding of analog/mixed-signal circuits including PLLs, LDOs, ADC/DACs, RF/IF paths, clocking, and amplifiers.
  • Experience with mixed-signal co-simulation environments such as Cadence AMS Designer, Synopsys VCS AMS, or similar.
  • Experience building AMS verification methodologies from scratch, preferred.
  • Familiarity with UVM-based verification and digital design flows, preferred.
  • Knowledge of signal processing theory, RF system modeling, or communication systems, preferred.
  • Experience with MATLAB/Simulink, Python modeling, or SystemC AMS for high-level architectural modeling, preferred.
  • Experience working in cross-functional, geographically distributed teams, preferred.
  • Must be a U.S. person or otherwise eligible for a federally issued export control license due to ITAR requirements.

Benefits

  • Base salary range of $160,000–$230,000 plus equity.
  • Compensation is based on knowledge, skills, education, and experience.
  • Comprehensive benefits package.
  • Paid time off.
  • Medical, dental, and vision coverage.
  • Life insurance.
  • Paid parental leave.
  • Other additional perks.

Interested in this position?

Apply directly on the company website

Apply Now

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