Principal FW/SW Engineer

7 hours, 52 minutes ago
Full-time
Lead
Software Development
Astera Labs

Astera Labs

Astera Labs | Intelligent Connectivity Platform for Cloud and AI Infrastructure Purpose built connectivity solutions to remove performance bottlenecks in compute intensive workloads, such as AI and machine learning Astera Labs Inc., headquartered in th...

Industrial Conglomerates
51-250
Founded 2017
$206M raised

Description

  • Own the embedded firmware stack from hardware abstraction and device drivers through diagnostics, management interfaces, and customer APIs.
  • Design firmware for equalization, calibration, link training, thermal management, telemetry, and mixed-signal control.
  • Develop control algorithms, state machines, and tuning flows for high-speed interfaces across process, voltage, and temperature variation.
  • Define software quality gates, validation criteria, and release practices from pre-silicon through production.
  • Debug Ethernet configurations and failures across PHY, SERDES, FEC/PCS, MAC, retimer, and gearbox components.
  • Develop test plans, automate characterization workflows, and validate firmware across product configurations and corner cases.
  • Support customer bring-up, field issue triage, and deployment readiness.
  • Set technical direction, lead architecture and design reviews, and mentor engineers across cross-functional teams.
  • Lead recruiting, onboarding, technical development, and potentially people management as the organization grows.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
  • 8–12 years of experience developing embedded firmware or software for resource-constrained systems through production.
  • Strong embedded C/C++ skills, including microcontroller architecture, memory-mapped peripherals, interrupts, and bare-metal firmware.
  • Experience with Ethernet or high-speed connectivity devices such as PHYs, SERDES, retimers, gearboxes, NICs, or switches.
  • Understanding of physical-layer behavior, link state machines, register-level debugging, and hardware/software integration.
  • Experience with feedback systems, adaptive algorithms, calibration, or analog and mixed-signal subsystem tuning.
  • Proficiency with Microsoft development environments and Linux tools including GCC or Clang, Make, Bash, GDB, and Git.
  • Strong communication, systematic debugging, and problem-solving skills in ambiguous, fast-moving environments.
  • Preferred: Master’s degree; Python, Jenkins, and CI/CD experience; mixed-signal and Ethernet subsystem knowledge; lab equipment experience; RTOS, FPGA emulation, pre-silicon validation, or SDK/API development.
  • Ability to work remotely from Toronto or Ottawa and travel to San Jose approximately twice per year.

Benefits

  • CAD $184,500–$205,000 salary range, depending on experience, level, and business needs.
  • Potential eligibility for discretionary bonuses, incentives, and benefits.
  • Full-time remote role based in Toronto or Ottawa, Ontario.
  • Occasional travel to Astera Labs’ San Jose headquarters for chip bring-up and project coordination.

Interested in this position?

Apply directly on the company website

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