Compiler Engineer - Machine Learning Compiler

1 month ago
Full-time
Mid Level
Software Development
Mythic

Mythic

Mythic revolutionizes edge AI with power-efficient analog compute in memory technology, enabling affordable and powerful AI solutions from data centers to edge devices.

Semiconductors & Semiconductor Equipment
51-250
Founded 2012
$165M raised

Description

  • Design and implement components across the full compiler stack, including operator lowering, graph/IR transformations, optimization passes, and backend code generation.
  • Optimize compilation for dataflow architectures by developing pipelined schedules, memory orchestration, and resource-constrained execution strategies.
  • Define and refine the instruction set, execution model, and developer-facing interfaces to shape how workloads run on the accelerator.
  • Collaborate closely with hardware architects, ML researchers, and engineers to influence architectural features and ensure compiler–hardware co-evolution.
  • Develop compilation strategies that unify analog compute with digital subsystems and support heterogeneous execution.
  • Build and maintain a compiler and tooling that produce high-performance binaries with strong debugging support, clear error messages, and predictable performance models.
  • Contribute to continuous integration, testing, and performance validation to ensure reliable and reproducible compiler behavior.

Requirements

  • 3+ years of experience building compilers or high-performance systems software, particularly involving complex resource management or optimization.
  • Expert-level experience with modern C++ (C++14/17/20) and strong proficiency in Python.
  • Experience with compiler IRs (SSA-based or graph-based), transformations, and code generation.
  • Exposure to specialized accelerators or parallel architectures (GPU, NPU, FPGA, or custom ASIC).
  • Experience optimizing for resource-constrained or dataflow-style architectures (scheduling, memory orchestration).
  • Experience with ML compiler stacks (ONNX, MLIR, TVM, XLA, IREE, PyTorch) and/or contributions to MLIR or LLVM projects (nice to have).
  • Familiarity with optimization methods (LP/MIP, CP, SAT/SMT) and solvers like Gurobi or OR-Tools for scheduling/resource allocation (nice to have).
  • Experience compiling DNN workloads for specialized accelerators or GPUs/DSPs with compiler backend work beyond kernel tuning (nice to have).
  • Familiarity with heterogeneous compilation (mixing custom accelerators with CPUs/GPUs/NPUs) and exposure to analog or in-memory compute, and prior compiler–hardware co-design experience (nice to have).

Benefits

  • Competitive compensation with equity package.
  • Comprehensive benefits package.
  • Flexible/remote work options (locations include Palo Alto, Austin, Vancouver, and remote).
  • High-impact role spanning software and hardware co-design with the opportunity to shape how deep learning and LLM workloads are compiled on novel hardware.
  • Collaborative, innovative team culture emphasizing engineering rigor, continuous integration, shared learning, and professional development.

Interested in this position?

Apply directly on the company website

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