Foundry Interface Engineer

1 hour, 59 minutes ago
Full-time
Senior
IoT and Embedded Systems
Block

Block

Block is a company that consists of Square, Cash App, Spiral, TIDAL, TBD, and foundational teams. They are focused on economic empowerment by creating tools to expand access to the economy. Square helps sellers run and grow businesses, Cash App redefin...

Capital Markets
10K-50K
Founded 2009

Description

  • Engage with foundry partners and third-party vendors to manage foundry PDK/DK and design library collaterals.
  • Guide internal IP and design teams on appropriate use of technology offerings in line with product requirements.
  • Collaborate with infrastructure, customization, test-chip, methodology, packaging, and product test engineering teams to support product bring-up and productization.
  • Review foundry silicon data against SPICE and design goals and compile SPICE-to-silicon gap analyses.
  • Drive foundry partners on continuous improvement proposals to meet technology entitlement and product goals.
  • Work with foundries to identify device parameter changes that improve low-voltage operation.
  • Partner with circuit designers to determine device improvements that enhance circuit performance and energy efficiency.
  • Work with test engineers to analyze and validate production wafer data.
  • Contribute to binning strategy to maximize parametric yield.

Requirements

  • 5+ years of post-education experience in FAB or fabless environments, including technology definition and bring-up, device/process architecture, and NPI.
  • Experience with foundry design kits, SPICE, DR/DRC evaluation, and SPICE-to-silicon assessment.
  • Experience with advanced-node device physics such as FinFET or GAA, backside power, and product design phases.
  • Experience with product KPIs, DTCO, and parametric as well as DLY/PLY analysis and gap closure.
  • Understanding of low-power design techniques such as Vmin reduction, power gating, multi-voltage design, chip power, and clock network optimization.
  • Understanding of layout effects and their impact on circuit design.
  • Master’s degree or PhD in Electrical Engineering, Physics, or a related engineering field with emphasis on semiconductor materials, devices, and device physics, preferred and not a substitute for professional experience.
  • Production test development experience, preferred.
  • Familiarity with advanced FinFET technology nodes such as 3nm and 2nm, preferred.
  • Familiarity with PDK and device models, preferred.
  • Previous work experience at semiconductor foundries, preferred.
  • Familiarity with standard cell design and layout, preferred.

Benefits

  • Remote work.
  • Medical insurance.
  • Flexible time off.
  • Retirement savings plans.
  • Modern family planning benefits.
  • Inclusive and accommodating interview process with reasonable accommodations for disabled applicants.
  • Up to 9 active applications within a 60-day period and reapplication to the same role after 90 days, as stated in the application guidelines.

Interested in this position?

Apply directly on the company website

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